Blog Archives

Playing with the Cyclone V SoC system – DE0-Nano-SoC Kit/Atlas-SoC

Recently I bought the DE0-Nano-SoC Kit/Atlas-SoC development board from Terasic which contains a Cyclone V SoC from Altera. The board is a good starting point to get involved in embedded system development with SoCs. The Cyclone V SoC is a

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Interpolation implementation in VHDL

This is a follow up on the previews article on the low and high pass filter designer. An algorithm is developed in order to perform interpolation. The FIR low pass filter from the last post is used in the interpolation

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Low and High pass filter designer for implementation in VHDL

This post is about digital low and high pass FIR filter design in VHDL. Implementing high/low pass filter in the digital domain has a lot of benefits compared to implementations in the analog domain. The VHDL code for an implementation

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Breakout board for the DAC900E a 165 MSPS @ 10 Bit DAC

This breakout board helps me to interface my FPGA with the DAC900E from Texas Instruments. The DAC has 165 MSPS and 10 bits which is quite some speed. The combination FPGA and DAC opens up for experiments with digital signal

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FTDI FT232H USB 2.0 FPGA extension for the Altera DE0

This is a PCB design using the USB 2.0 IC from FTDI, FT232H – Hi-Speed Single Channel USB UART/FIFO IC, to connect it to the GPIO port of the Altera DE0 development board. The design should also work with other

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ADC readout and USB2.0 data transfer with an FPGA

Recently I bought the Altera DE0 Development and Education FPGA board from Terasic. This is a project giving the development board a fast USB2.0 interface. As an USB 2.0 controller the FT232H Single Channel Hi-Speed USB to Multipurpose UART/FIFO IC

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