ADC readout and USB2.0 data transfer with an FPGA

Recently I bought the Altera DE0 Development and Education FPGA board from Terasic. This is a project giving the development board a fast USB2.0 interface. As an USB 2.0 controller the FT232H Single Channel Hi-Speed USB to Multipurpose UART/FIFO IC from FTDI (Future Technology Devices International) was chosen. A state machine to control the USB 2.0 interface was developed.
Since also some data should be read from the interface an 8 bit ADC is interfaced by the FPGA. The ADC is a AD9057 from Analog Devices, for which also a PCB with 40 Pin connector to the FPGA was developed.

The detailed project description can be found under

The code is written in VHDL using the Altera Quartus II development framework.
The whole project can easily be used as a fast oscilloscope. The sample rate should be in the actual design at 25 MHz but can easily be increased to the maximum of the ADC.

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